Silicon Labs /Series1 /EFR32MG12P /EFR32MG12P433F1024GL125 /VDAC0 /OPA1_MUX

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Interpret as OPA1_MUX

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0POSSEL0NEGSEL0 (DISABLE)RESINMUX 0 (GAIN3X)GAIN3X 0 (RES0)RESSEL

RESINMUX=DISABLE, RESSEL=RES0

Description

Operational Amplifier Mux Configuration Register

Fields

POSSEL

OPAx Non-inverting Input Mux

NEGSEL

OPAx Inverting Input Mux

RESINMUX

OPAx Resistor Ladder Input Mux

0 (DISABLE): Set for Unity Gain

1 (OPANEXT): Set for NEXTOUT(x-1) input

2 (NEGPAD): NEG pad connected

3 (POSPAD): POS pad connected

4 (COMPAD): Neg pad of OPA0 connected. Direct input to support common reference.

5 (CENTER): OPA0 and OPA1 Resmux connected to form fully differential instrumentation amplifier.

6 (VSS): VSS connected

GAIN3X

OPAx Dedicated 3x Gain Resistor Ladder

RESSEL

OPAx Resistor Ladder Select

0 (RES0): Gain of 1/3

1 (RES1): Gain of 1

2 (RES2): Gain of 1 2/3

3 (RES3): Gain of 2 1/5

4 (RES4): Gain of 3

5 (RES5): Gain of 4 1/3

6 (RES6): Gain of 7

7 (RES7): Gain of 15

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